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1 ? el2126 ultra-low noise, low power, wideband amplifier the el2126 is an ultra-low no ise, wideband amplifier that runs on half the supply current of competitive parts. it is intended for use in systems such as ultrasound imaging where a very small signal needs to be amplified by a large amount without adding signifi cant noise. its low power dissipation enables it to be packaged in the tiny sot-23 package, which further help s systems where many input channels create both space and power dissipation problems. the el2126 is stable for gains of 10 and greater and uses traditional voltage feedback. this allows the use of reactive elements in the feedback l oop, a common requirement for many filter topologies. it operates from 2.5v to 15v supplies and is available in the 5 ld sot-23 and 8 ld so packages. the el2126 is fabricated in elantec?s proprietary complementary bipolar process, and is specified for operation over the full -40c to +85c temperature range. pinouts el2126 (5 ld sot-23) top view el2126 (8 ld so) top view features ? voltage noise of only 1.3nv/hz ? current noise of only 1.2pa/hz ? 200v offset voltage ? 100mhz -3db bw for a v = 10 ? very low supply current - 4.7ma ? sot-23 package ? 2.5v to 15v operation ? pb-free plus anneal available (rohs compliant) applications ? ultrasound input amplifiers ? wideband instrumentation ? communication equipment ? agc & pll active filters ? wideband sensors 1 2 3 5 4 - + vs+ in- in+ vs- out 1 2 3 4 8 7 6 5 - + nc in- in+ vs- nc vs+ out nc caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2002, 2005, 2007. all rights reserved all other trademarks mentioned are the property of their respective owners. fn7046.3 data sheet april 16, 2007
2 fn7046.3 april 16, 2007 ordering information part number part marking temp range (c) tape & reel package pkg. dwg. # el2126cw-t7 g -40 to +85 7? (3k pcs) 5 ld sot-23 mdp0038 el2126cw-t7a g -40 to +85 7? (250 pcs) 5 ld sot-23 mdp0038 el2126cs 2126cs -40 to +85 - 8 ld soic mdp0027 el2126cs-t7 2126cs -40 to +85 7? 8 ld soic mdp0027 el2126cs-t13 2126cs -40 to +85 13? 8 ld soic mdp0027 el2126csz ( note) 2126csz -40 to +85 - 8 ld soic (pb-free) mdp0027 el2126csz-t7 ( note) 2126csz -40 to +85 7? 8 ld soic (pb-free) mdp0027 el2126csz-t13 ( note) 2126csz -40 to +85 13? 8 ld soic (pb-free) mdp0027 EL2126CWZ-T7 (note) baah -40 to +85 7? 5 ld sot-23 p5.064 EL2126CWZ-T7a (note) baah -40 to +85 7? 5 ld sot-23 p5.064 note: intersil pb-free products employ special pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are rohs compliant and compatible with both snpb and pb-free soldering operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. el2126
3 fn7046.3 april 16, 2007 absolute maximum rati ngs thermal information v s + to v s -) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33v continuous output current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40ma any input . . . . . . . . . . . . . . . . . . . . . . . . . . v s + - 0.3v to v s - + 0.3v operating temperature . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-60c to +150c maximum die junction temperature . . . . . . . . . . . . . . . . . . . +150c power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v s + = +5v, v s - = -5v, t a = +25c, r f = 180 , r g = 20 , r l = 500 unless otherwise specified. parameter description conditions min typ max unit dc performance v os input offset voltage (so8) 0.2 2 mv input offset voltage (sot23-5) 3mv t cvos offset voltage temperature coefficient 17 v/c i b input bias current -10 -7 a i os input bias current offset 0.06 0.6 a t cib input bias current temperature coefficient 0.013 a/c c in input capacitance 2.2 pf a vol open loop gain v o = -2.5v to +2.5v 80 87 db psrr power supply rejection ratio (note 1) 80 100 db cmrr common mode rejection ratio at cmir 75 106 db cmir common mode input range -4.6 3.8 v v outh positive output voltage swing no load, r f = 1k 3.8 3.8 v v outl negative output voltage swing no load, r f = 1k -4 -3.9 v v outh2 positive output voltage swing r l = 100 3.2 3.45 v v outl2 negative output voltage swing r l = 100 -3.5 -3.2 v i out output short circuit current (note 2) 80 100 ma i sy supply current 4.7 5.5 ma ac performance - r g = 20 , c l = 3pf bw -3db bandwidth, r l = 500 100 mhz bw 0.1db 0.1db bandwidth, r l = 500 17 mhz bw 1db 1db bandwidth, r l = 500 80 mhz peaking peaking, r l = 500 0.6 db sr slew rate v out = 2v p-p , measured at 20% to 80% 80 110 v/s os overshoot, 4v p-p output square wave positive 2.8 % negative -7 % t s settling time to 0.1% of 1v pulse 51 ns el2126
4 fn7046.3 april 16, 2007 v n voltage noise spectral density 1.3 nv/ hz i n current noise spectral density 1.2 pa/ hz hd2 2nd harmonic distortion (note 3) -70 dbc hd3 3rd harmonic distortion (note 3) -70 dbc notes: 1. measured by moving the supplies from 4v to 6v 2. pulse test only and using a 10 load 3. frequency = 1mhz, v out = 2v p-p , into 500 and 5pf load electrical specifications v s + = +5v, v s - = -5v, t a = +25c, r f = 180 , r g = 20 , r l = 500 unless otherwise specified. (continued) parameter description conditions min typ max unit electrical specifications v s + = +15v, v s - = -15v, t a = 25c, r f = 180 , r g = 20 , r l = 500 unless otherwise specified. parameter description conditions min typ max unit dc performance v os input offset voltage (so8) 0.5 3 mv input offset voltage (sot23-5) 3mv t cvos offset voltage temperature coefficient 4.5 v/c i b input bias current -10 -7 a i os input bias current offset 0.12 0.7 a t cib input bias current temperature coefficient 0.016 a/c c in input capacitance 2.2 pf a vol open loop gain 80 90 db psrr power supply rejection ratio (note 4) 65 80 db cmrr common mode rejection ratio at cmir 70 85 db cmir common mode input range -14.6 13.8 v v outh positive output voltage swing no load, r f = 1k 13.6 13.7 v v outl negative output voltage swing no load, r f = 1k -13.8 -13.7 v v outh2 positive output voltage swing r l = 100 , r f = 1k 10.2 11.2 v v outl2 negative output voltage swing r l = 100 , r f = 1k -10.3 -9.5 v i out output short circuit current (note 5) 140 220 ma i sy supply current 56ma ac performance - r g = 20 , c l = 3pf bw -3db bandwidth, r l = 500 135 mhz bw 0.1db 0.1db bandwidth, r l = 500 26 mhz bw 1db 1db bandwidth, r l = 500 60 mhz peaking peaking, r l = 500 2.1 db sr slew rate (2.5v square wave, measured 25%-75%) 130 150 v/s os overshoot, 4v p-p output square wave positive 1.6 % negative -4.4 % t s settling time to 0.1% of 1v pulse 48 ns el2126
5 fn7046.3 april 16, 2007 notes: 4. measured by moving the supplies from 13.5v to 16.5v 5. pulse test only and using a 10 load 6. frequency = 1mhz, v out = 2v p-p , into 500 and 5pf load v n voltage noise spectral density 1.4 nv/ hz i n current noise spectral density 1.1 pa/ hz hd2 2nd harmonic distortion (note 6) -72 dbc hd3 3rd harmonic distortion (note 6) -73 dbc electrical specifications v s + = +15v, v s - = -15v, t a = 25c, r f = 180 , r g = 20 , r l = 500 unless otherwise specified. (continued) parameter description conditions min typ max unit el2126
6 fn7046.3 april 16, 2007 typical performance curves non-inverting frequency response for various r f 10 6 2 -2 -6 -10 1m 10m 100m frequency (hz) normalized gain (db) r f =1k r f =500 r f =180 r f =100 v s =5v a v =10 c l =5pf r l =500 non-inverting frequency response for various r f 10 6 2 -2 -6 -10 1m 10m 100m frequency (hz) normalized gain (db) r f =1k r f =500 r f =180 r f =100 inverting frequency response for various r f 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) v s =15v a v =-10 c l =5pf r l =500 inverting frequency response for various r f 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) v s =5v a v =-10 c l =5pf r l =500 non-inverting frequency response for various gain 10 6 2 -2 -6 -10 1m 10m 100m frequency (hz) normalized gain (db) a v =10 v s =5v r g =20 r l =500 c l =5pf non-inverting frequency response for various gain 10 6 2 -2 -6 -10 1m 10m 100m frequency (hz) normalized gain (db) r f =1k r f =350 r f =100 r f =200 r f =500 r f =1k r f =500 r f =200 r f =100 r f =350 a v =20 a v =50 v s =15v r g =20 r l =500 c l =5pf a v =10 a v =20 a v =50 v s =15v a v =10 c l =5pf r l =500 el2126
7 fn7046.3 april 16, 2007 typical performance curves (continued) inverting frequency response for various gain 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) inverting frequency response for various r f 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) non-inverting frequency response for various output signal levels 10 6 2 -2 -6 -10 1m 10m 100m frequency (hz) normalized gain (db) non-inverting frequency response for various output signal levels 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) inverting frequency response for various output signal levels 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) inverting frequency response for various output signal levels 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) v s =5v c l =5pf r g =35 a v =-10 a v =-20 a v =-50 v s =15v c l =5pf r g =20 a v =-10 a v =-20 a v =-50 v s =5v c l =5pf r l =500 r f =180 a v =10 v o =2.5v pp v o =5v pp v o =1v pp v o =30mv pp v o =500mv pp v s =15v c l =5pf r l =500 r f =180 a v =10 v o =5v pp v o =1v pp v o =2.5v pp v o =30mv pp v o =500mv pp v o =10v pp v s =5v c l =5pf r l =500 r f =350 a v =10 v o =3.4v pp v o =1v pp v o =2.5v pp v o =30mv pp v o =500mv pp v s =15v c l =5pf r l =500 r f =200 a v =10 v o =3.4v pp v o =1v pp v o =2.5v p v o =30mv pp v o =500mv pp v o =2.5v pp el2126
8 fn7046.3 april 16, 2007 typical performance curves (continued) non-inverting frequency response for various c l 10 6 2 -2 -6 -10 1m 10m 100m frequency (hz) normalized gain (db) non-inverting frequency response for various c l 10 6 2 -2 -6 -10 1m 10m 100m frequency (hz) normalized gain (db) inverting frequency response for various c l 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) inverting frequency response for various c l 8 4 0 -4 -8 -12 1m 10m 100m frequency (hz) normalized gain (db) open loop gain/phase 100 80 60 40 20 0 10k 10m 1g frequency (hz) open loop gain (db) supply current vs supply voltage 0.6/div 1.5/div supply voltage (v) supply current (ma) c l =28pf c l =16pf c l =11pf c l =5pf c l =1pf v s =15v r f =180 a v =10 r l =500 c l =28pf c l =16pf c l =11pf c l =5pf c l =1.2pf v s =5v r f =350 r l =500 a v =-10 c l =28pf c l =16pf c l =11pf c l =5pf c l =1.2pf c l =28pf c l =16pf c l =11p c l =5pf c l =1.2pf v s =15v r f =200 r l =500 a v =-10 100k 100m 1m 250 150 50 -50 -150 -250 open loop phase () 0 0 v s =5v r f =150 a v =10 r l =500 gain phase v s =5v c l =11pf el2126
9 fn7046.3 april 16, 2007 typical performance curves (continued) peaking vs v s 3.0 2.5 2.0 1.0 0.5 0 0246810 1416 supply voltage (v) peaking (db) 12 1.5 bandwidth vs v s 160 140 100 80 40 20 0 0246810 1416 v s (v) -3db bandwidth 12 60 120 1mhz harmonic distortion vs output swing -40 -50 -60 -80 -90 -100 012345 78 v out (v p-p ) harmonic distortion (dbc) 6 -70 1mhz harmonic distortion vs output swing -30 -40 -60 -80 -90 -100 0 5 10 15 20 25 v out (v p-p ) harmonic distortion (dbc) -70 -50 v s =5v r g =20 r l =500 c l =5pf a v =10 a v =-10 2nd hd 3rd hd 2nd hd v s =5v r g =20 r l =500 c l =5pf v s =5v v o =2v p-p r f =180 a v =10 r l =500 a v =-10 a v =10 a v =-20 a v =-20 a v =50 a v =-50 v s =5v v o =2v p-p r f =180 a v =10 r l =500 3rd hd large signal step response 0.5v/div 10ns/div small signal step response 20mv/div 10ns/div v s =5v v o =100mv r f =180 r g =20 v s =5v v o =2v pp r f =180 r g =20 el2126
10 fn7046.3 april 16, 2007 typical performance curves (continued) group delay vs frequency 16 8 0 -4 1m 10m 100m 400m frequency (hz) group delay (ns) 4 12 v s =5v r l =500 a v =10 a v =-10 noise vs frequency 10 1 10 100 10k 100k frequency (hz) i n (pa/ hz), v n (nv/ hz) 1k cmrr vs frequency -10 -50 -90 -110 10 1m 10m 100m frequency (hz) cmrr (db) -70 -30 1k 100k 100 10k settling time vs accuracy 70 40 20 0 0.1 1.0 10.0 accuracy (%) settling time (ns) 30 50 v s = 5 v , v o = 5 v p - p v s = 1 5 v , v o = 5 v p - p v s = 1 5 v , v o = 2 v p - p v s = 5 v , v o = 2v p - p 60 10 total harmonic distortion vs frequency -20 -50 -80 -90 1k 10k 100m frequency (hz) thd (dbc) v s =5v v o =2v p-p 100k 1m 10m -30 -40 -70 -60 psrr vs frequency 110 70 30 10 10k 100k 1m 10m 200m frequency (hz) psrr (db) 50 90 v s =5v psrr+ psrr- i n , v s =5v v n , v s =15v i n , v s =15v v n , v s =5v el2126
11 fn7046.3 april 16, 2007 typical performance curves (continued) closed loop output impedance vs frequency 100 10 1 0.1 0.01 10k 1m 100m frequency (hz) closed loop output impedance ( ) bandwidth and peaking vs temperature 120 100 60 40 20 0 -40 40 160 temperature bandwidth (mhz) 100k 10m v s =5v v s =5v 80 80 0120 3.5 3 2.5 2 1.5 1 0.5 0 -0.5 peaking (db) slew rate vs swing 220 180 140 100 60 -1 v out swing (v pp ) slew rate (v/s) 371115 5v sr + 5v sr - 15v sr + 15v sr - 15913 200 160 120 80 bandwidth peaking 1 -2 0 -1 4.8 5.2 5.1 5 4.9 supply current vs temperature -50 0 100 150 50 die temperature (c) i s (ma) v s =5v v s =15v offset voltage vs temperature -50 0 100 150 50 die temperature (c) v s =5v v s =15v v os (mv) cmrr vs temperature -50 0 100 150 50 die temperature (c) cmrr (db) 120 110 100 90 80 v s =5v el2126
12 fn7046.3 april 16, 2007 typical performance curves (continued) 110 86 90 94 98 102 106 82 psrr vs temperature -50 0 100 150 50 die temperature (c) psrr (db) v s =5v v s =15v positive output swing vs temperature -50 0 100 150 50 die temperature (c) v outh (v) v s =5v positive output swing vs temperature -50 0 100 150 50 die temperature (c) v outh (v) v s =15v 4.05 4 3.95 3.9 3.85 3.8 13.85 13.8 13.75 13.7 13.65 13.6 -3.9 -3.95 -4.05 -4.25 -4.15 -13.76 -13.78 -13.8 -13.82 negative output swing vs temperature -50 0 100 150 50 die temperature (c) v outl (v) v s =5v negative output swing vs temperature -50 0 100 150 50 die temperature (c) v s =15v v outl (v) -4 -4.1 -4.2 slew rate vs temperature -50 0 100 150 50 die temperature (c) slew rate (v/s) 102 100 96 92 88 98 94 90 v s =5v el2126
13 fn7046.3 april 16, 2007 typical performance curves (continued) 155 150 140 135 3.52 3.5 3.46 3.44 slew rate vs temperature -50 0 100 150 50 die temperature (c) sr (v/s) v o =2v pp v s =15v positive loaded output swing vs temperature -50 0 100 150 50 die temperature (c) v outh2 (v) v s =5v 11.8 11.6 11.2 10.8 10.6 positive loaded output swing vs temperature -50 0 100 150 50 die temperature (c) sr (v/s) v s =15v 145 3.48 11.4 11 -3.35 -3.4 -3.45 -3.6 -3.5 3.55 -9.4 -9.8 -10.2 -10.6 negative loaded output swing vs temperature -50 0 100 150 50 die temperature (c) v outl2 (v) v s =5v negative loaded output swing vs temperature -50 0 100 150 50 die temperature (c) v s =15v v outl2 (v) -9.6 -10 -10.4 1.2 0.6 0 package power dissipation vs ambient temperature jedec jesd51-3 low effective thermal conductivity test board 0 ambient temperature (c) power dissipation (w) 25 125 150 75 1 0.4 0.8 0.2 100 50 85 488mw 781mw j a = + 1 6 0 c / w s o 8 j a = + 2 5 6 c / w s ot 2 3 - 5 1.8 0.8 0 1.6 0.4 1.2 0.2 0.6 1.4 1 package power dissipation vs ambient temperature jedec jesd51-7 high effective thermal conductivity test board 0 ambient temperature (c) power dissipation (w) 25 125 150 75 100 50 85 543mw ja = + 1 1 0 c / w s o 8 1.136w j a = + 2 3 0 c / w s o t 2 3 - 5 el2126
14 fn7046.3 april 16, 2007 pin descriptions el2126cw (5 ld sot-23) el2126cs (8 ld so) pin name pin function equivalent circuit 1 6 vout output circuit 1 2 4 vs- supply 3 3 vina+ input circuit 2 4 2 vina- input reference circuit 2 5 7 vs+ supply v out v s + v in - v in + v s + v s - el2126
15 fn7046.3 april 16, 2007 applications information product description the el2126 is an ultra-low noise, wideband monolithic operational amplifier built on elantec's proprietary high speed complementary bipolar pr ocess. it features 1.3nv/ hz input voltage noise, 200v typical offset voltage, and 73db thd. it is intended for use in systems such as ultrasound imaging where very small signals are needed to be amplified. the el2126 also has excellent dc specifications: 200v v os , 22a ib, 0.4a i os , and 106db cmrr. these specifications allow the el2126 to be used in dc-sensitive applications such as difference amplifiers. gain-bandwidth product the el2126 has a gain-bandwidth product of 650mhz at 5v. for gains less than 20, higher-order poles in the amplifier's transfer function contribute to even higher closed- loop bandwidths. for example, the el2126 has a -3db bandwidth of 100mhz at a gain of 10 and decreases to 33mhz at gain of 20. it is im portant to note that the extra bandwidth at lower gain does not come at the expenses of stability. even though the el2126 is designed for gain 10. with external compensation, t he device can also operate at lower gain settings. the rc network shown in figure 1 reduces the feedback gain at high frequency and thus maintains the amplifier stability. r values must be less than rf divided by 9 and 1 divided by 2 rc must be less than 200mhz. choice of feedback resistor, rf the feedback resistor forms a pole with the input capacitance. as this pole becomes larger, phase margin is reduced. this increases ringing in the time domain and peaking in the frequency domain. therefore, rf has some maximum value which should not be exceeded for optimum performance. if a large value of rf must be used, a small capacitor in the few pf range in parallel with rf can help to reduce this ringing and peaking at the expense of reducing the bandwidth. frequency respon se curves for various rf values are shown in the typical performance curves section of this data sheet. noise calculations the primary application for the el2126 is to amplify very small signals. to maintain the proper signal-to-noise ratio, it is essential to minimize noise contribution from the amplifier. figure 2 below shows all the noise sources for all the components around the amplifier. v n is the amplifier input voltage noise i n + is the amplifier positive input current noise i n - is the amplifier negative input current noise v rx is the thermal noise associated with each resistor: where: k is boltzmann's constant = 1.380658 x 10 -23 t is temperature in degrees kelvin (273+ c) the total noise due to the amplif ier seen at the output of the amplifier can be calculated by using the equation 2. as the equation shows, to keep noise at a minimum, small resistor values should be us ed. at higher amplifier gain configuration where r 2 is reduced, the noise due to in-, r 2 , and r 1 decreases and the noise caused by in+, vn, and r 3 starts to dominate. because noise is summed in a root- mean-squares method, noise sources smaller than 25% of the largest noise source can be ignored. this can greatly simplify the formula and make noise calculation much easier to calculate. - + r f r c v in v out figure 1. - + v on v in i n + i n - r 2 r 3 r 1 v n v r3 v r2 v r1 figure 2. v rx 4ktrx = (eq. 1) v on bw = vn 2 1 r 1 r 2 ------ - + ?? ?? ?? 2 in- 2 r 1 2 in+ 2 r 3 2 1 r 1 r 2 ------ - + ?? ?? ?? 2 + 4ktr 1 4ktr 2 r 1 r 2 ------ - ?? ?? ?? 2 + 4ktr 3 1 r 1 r 2 ------ - + ?? ?? ?? 2 ++ + ? ? ? ? ? ? (eq. 2) el2126
16 fn7046.3 april 16, 2007 output drive capability the el2126 is designed to drive low impedance load. it can easily drive 6v p-p signal into a 100 load. this high output drive capability makes the el2126 an ideal choice for rf, if, and video applications. furthermore, the el2126 is current-limited at the outpu t, allowing it to withstand momentary short to ground. however, the power dissipation with output-shorted cannot exceed the power dissipation capability of the package. driving cables and capacitive loads although the el2126 is designed to drive low impedance load, capacitive loads will decreases the amplifier's phase margin. as shown in the per formance curves, capacitive load can result in peaking, overshoot and possible oscillation. for optimum ac performance, capacitive loads should be reduced as much as possible or isolated with a series resistor between 5 to 20 . when driving coaxial cables, double termination is always recommended for reflection-free performance. when properly terminated, the capacitance of the coaxial cable will not add to the capacitive load seen by the amplifier. power supply bypassing and printed circuit board layout as with any high frequency devices, good printed circuit board layout is essential fo r optimum performance. ground plane construction is highly recommended. lead lengths should be kept as short as possible. the power supply pins must be closely bypassed to reduce the risk of oscillation. the combination of a 4.7f tantalum capacitor in parallel with 0.1f ceramic capacitor has been proven to work well when placed at each supply pin. for single supply operation, where pin 4 (v s -) is connected to the ground plane, a single 4.7f tantalum capacitor in parallel with a 0.1f ceramic capacitor across pins 7 (v s +) and pin 4 (v s -) will suffice. for good ac performance, parasitic capacitance should be kept to a minimum. ground plane construction again should be used. small chip resistors are recommended to minimize series inductance. use of sockets should be avoided since they add parasitic inductance and capacitance which will result in additional peaking and overshoot. supply voltage range and single supply operation the el2126 has been designed to operate with supply voltage range of 2.5v to 15v. with a single supply, the el2126 will operate from +5v to +30v. pins 4 and 7 are the power supply pins. the positive power supply is connected to pin 7. when used in single supply mode, pin 4 is connected to ground. when used in dual supply mode, the negative power supply is connected to pin 4. as the power supply voltage decr eases from +30v to +5v, it becomes necessary to pay spec ial attention to the input voltage range. the el2126 has an input voltage range of 0.4v from the negative supply to 1.2v from the positive supply. so, for example, on a single +5v supply, the el2126 has an input voltage range which spans from 0.4v to 3.8v. the output range of the el2126 is also quite large, on a +5v supply, it swings from 0.4v to 3.8v. el2126
17 fn7046.3 april 16, 2007 el2126 small outline package family (so) gauge plane a2 a1 l l1 detail x 4 4 seating plane e h b c 0.010 b m ca 0.004 c 0.010 b m ca b d (n/2) 1 e1 e n n (n/2)+1 a pin #1 i.d. mark h x 45 a see detail ?x? c 0.010 mdp0027 small outline package family (so) symbol inches tolerance notes so-8 so-14 so16 (0.150?) so16 (0.300?) (sol-16) so20 (sol-20) so24 (sol-24) so28 (sol-28) a 0.068 0.068 0.068 0.104 0.104 0.104 0.104 max - a1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - a2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - d 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 e 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - e1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 basic - l 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - l1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 reference - n 8 14 16 16 20 24 28 reference - rev. m 2/07 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m - 1994
18 fn7046.3 april 16, 2007 el2126 small outline transistor plastic packages (sot23-5) d e 1 e e1 c l c c l e b c l a2 a a1 c l 0.20 (0.008) m 0.10 (0.004) c c -c- seating plane 4 5 123 view c view c l r1 r 4x 1 4x 1 gauge plane l1 seating l2 c plane c base metal with c1 b1 plating b p5.064 5 lead small outline transistor plastic package symbol inches millimeters notes min max min max a 0.036 0.057 0.90 1.45 - a1 0.000 0.0059 0.00 0.15 - a2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 d 0.111 0.118 2.80 3.00 3 e 0.103 0.118 2.60 3.00 - e1 0.060 0.067 1.50 1.70 3 e 0.0374 ref 0.95 ref - e1 0.0748 ref 1.90 ref - l 0.014 0.022 0.35 0.55 4 l1 0.024 ref. 0.60 ref. l2 0.010 ref. 0.25 ref. n5 55 r 0.004 - 0.10 - r1 0.004 0.010 0.10 0.25 0 o 8 o 0 o 8 o - rev. 2 9/03 notes: 1. dimensioning and tolerance per asme y14.5m-1994. 2. package conforms to eiaj sc-74 and jedec mo178aa. 3. dimensions d and e1 are exclusiv e of mold flash, protrusions, or gate burrs. 4. footlength l measured at reference to gauge plane. 5. ?n? is the number of terminal positions. 6. these dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. controlling dimension: millime ter. converted inch dimen- sions are for reference only.
19 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7046.3 april 16, 2007 el2126 sot-23 package family e1 n a d e 4 3 2 1 e1 0.15 d c 2x 0.20 c 2x e b 0.20 m d c a-b b nx 6 2 3 5 seating plane 0.10 c nx 1 3 c d 0.15 a-b c 2x a2 a1 h c (l1) l 0.25 0 +3 -0 gauge plane a mdp0038 sot-23 package family symbol millimeters tolerance sot23-5 sot23-6 a 1.45 1.45 max a1 0.10 0.10 0.05 a2 1.14 1.14 0.15 b 0.40 0.40 0.05 c 0.14 0.14 0.06 d 2.90 2.90 basic e 2.80 2.80 basic e1 1.60 1.60 basic e 0.95 0.95 basic e1 1.90 1.90 basic l 0.45 0.45 0.10 l1 0.60 0.60 reference n 5 6 reference rev. f 2/07 notes: 1. plastic or metal protrusions of 0.25mm maximum per side are not included. 2. plastic interlead protrusions of 0.25mm maximum per side are not included. 3. this dimension is measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994. 5. index area - pin #1 i.d. will be located within the indicated zone (sot23-6 only). 6. sot23-5 version has no center lead (shown as a dashed line).

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